Embodiments described herein are related to the field of memory management techniques and, more particularly, to techniques for memory mapping on-the-fly.
This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present disclosure, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Electronic devices, such as portable and desktop computers, increasingly employ greater quantities of memory for high performance graphics and other features. In many cases, large portions of the memory may sit idle at a given time, since such large portions of memory may be in use only during memory-intensive operations, such as rending high-performance graphics. However, even while idle, the memory and accompanying circuitry may consume power.
Various techniques have been developed to reduce the power consumption of idle memory devices. For example, depending on the performance needs of the electronic device, memory and/or memory buses may be clocked at a lower frequency, but may continue to draw operating power. Moreover, while certain techniques may involve shutting down power to one or more memory devices of a portable electronic device to conserve power, these techniques do not provide on-the-fly memory remapping and/or may inefficiently copy data from the powered down memory to the memory that remains. Instead, these techniques may employ inefficient memory mapping structures, such as translation lookaside buffers (TLBs), and/or may involve copying data from various portions of the memory other than the portion that is to be powered down.